Part Number: 74LS569
Function: FOUR-BIT UP/DOWN COUNTER WITH THREE-STATE OUTPUTS
Package : DIP, SOP 8 Pin type
The 74LS569 is designed as programmable up/down BCD and Binary counters respectively. These devices have 3-state outputs for use in bus organized systems. With the exception of output enable (OE)and asynchronous clear (ACLR), all functions occur on the positive edge of the clock pulse (CP).
When the LOAD input is LOW, the outputs will be programmed by the parallel data inputs (A, B, C, D) on the next clock edge. Enabling of the counters occurs only when CEP and CET are LOW and LOAD is HIGH. Direction of the count is controlled by the up-down input (U/D), HIGH counts up and LOW counts down.
The device is a type of integrated circuit (IC) that belongs to the 74LSxx series of low-power Schottky TTL (Transistor-Transistor Logic) digital logic ICs. It is a 8-bit shift register that is used to store and transfer digital data in electronic circuits.
In addition to its basic shift register function, the 74LS569 also includes a number of other features, such as a clear input (CLR) that can be used to reset the register, and a hold input (H) that can be used to freeze the data in the register. The 74569 is designed for use in digital circuits that operate with a 5V power supply, and is capable of switching at high speeds, making it suitable for use in high-speed data transfer applications.
1. LOW POWER SCHOTTKY
74LS569 Datasheet PDF
Other data sheets are available within the file: SN74LS569N, SN74LS569DW, 74569