GD25Q80 – 8Mbit Dual and Quad SPI Flash

Part Number : GD25Q80

Function : 8Mbit Dual and Quad SPI Flash

Manufactures : GigaDevice

Images :

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GD25Q80 image

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Description :

Uniform Sector 8Mbit Dual and Quad SPI Flash Features ◆ GD25Q80 Speed 8M-bit Serial Flash -1024K-byte -256 bytes per programmable page Standard, Dual, Quad SPI -Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD# -Dual SPI: SCLK, CS#, IO0, IO1, WP#, HOLD# -Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3 High Speed Clock Frequency -120MHz for fast read with 30PF load -Dual I/O Data transfer up to 180Mbits/s -Quad I/O Data transfer up to 360Mbits/s ◆ Program/Erase -Page Program time: 0.7ms typical -Sector Erase time: 50ms typical -Block Erase time: 0.2/0.28/0.6s typical -Chip Erase time: 5s typical Flexible Architecture -Sector of 4K-byte -Block of 32/64/128K-byte ◆ Low Power Consumption -20mA maximum active current -5uA maximum power down current Advanced security Features(1) -16-Bit Customer ID -Security Architecture Single Power Supply Voltage -Full voltage range:2.7~3.6V ◆ Software/Hardware Write Protection ◆ -Write protect all/portion of memory via software -Enable/Disable protection with WP# Pin -Top or Bottom, Sector or Block selection ◆ Minimum 100,000 Program/Erase Cycles Note: 1.Please contact Gigadevice for details GENERAL Description The GD25Q80 (8M-bit) SPI flash supports the standard Serial Peripheral Interface (SPI), and supports the Dual/Quad SPI: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2 (WP#), and I/O3 (HOLD#). The Dual I/O data is transferred with speed of 180Mbits/s and the Quad I/O & Quad output data is transferred with speed of 360Mbits/s. CONNECTION DIAGRAM CS# SO WP# VSS 1 2 3 4 8 7 6 5 VCC HOLD# SCLK SI Top View 8–LEAD SOP/DIP 1 Uniform Sector 8Mbit Dual and Quad SPI Flash PIN Description Pin Name CS# SO (IO1) WP# (IO2) VSS SI (IO0) SCLK HOLD# (IO3) VCC I/O I I/O I/O I I/O I/O Description Chip Select Input Data Output (Data Input Output 1) Write Protect Input (Data Input Output 2) Ground Data Input (Data Input Output 0) Serial Clock Input Hold Input (Data Input Output 3) Power Supply GD25Q80 BLOCK DIAGRAM WP#(IO2) Write Control Logic Write Protect Logic and Row Decode Status Register HOLD#(IO3) SCLK CS# DI(IO0) DO(IO1) High Voltage Generators Page Address Latch/Counter SPI Command & Control Logic Flash Memory Column Decode And 256-Byte Page Buffer Byte Address Latch/Counter 2 Uniform Sector 8Mbit Dual and Quad SPI Flash MEMORY ORGANIZATION Each device has 1M 4K 256 8/16/32 Each block has 128/64/32K 512/256/128 32/16/8 Each sector has 4K 16 Each page has 256 – GD25Q80 bytes pages sectors blocks UNIFORM BLOCK SECTOR ARCHITECTURE GD25Q80 64K Bytes Block Sector Architecture Block Sector 255 15 … 240 239 14 224 47 2 32 31 1 … 16 15 0 … 0 Address range 0FF000H …… 0F0000H 0EF000H …… 0E0000H […]

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GD25Q80 Datasheet

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