P1403EVG – P-Channel Logic Level Enhancement Mode Field Effect Transistor

Part Number : P1403EVG

Function : P-Channel Logic Level Enhancement Mode Field Effect Transistor

Manufactures : NIKO-SEM

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Description :

www.DataSheet.co.kr NIKO-SEM P-Channel Logic Level Enhancement Mode P1403EVG SOP-8 Field Effect Transistor D PRODUCT SUMMARY V(BR)DSS -30 RDS(ON) 14mΩ ID -11 Halogen-Free & Lead-Free G S 4 :GATE 5,6,7,8 :DRAIN 1,2,3 :SOURCE ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless O PARAMETERS/TEST CONDITIONS Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Current Avalanche Energy Power Dissipation L = 0.1mH TA = 25 °C TA = 70 °C 1 therwise Noted) SYMBOL VDS VGS 100% UIS tested LIMITS -30 ±25 -11 -9 -50 -43 90 2.5 1.6 -55 to 150 mJ W A UNITS V V TA = 25 °C TA = 70 °C ID IDM IAS EAS PD Tj, Tstg Operating Junction & Storage Temperature Range °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient 1 SYMBOL RθJc RθJA TYPICAL MAXIMUM 25 50 UNITS °C / W °C / W Pulse width limited by maximum junction temperature. ELECTRICAL CHARACTERISTICS (TA = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current V(BR)DSS VGS(th) IGSS IDSS VGS = 0V, ID = -250µA VDS = VGS, ID = -250µA VDS = 0V, VGS = ±25V VDS = -24V, VGS = 0V VDS = -20V, VGS = 0V, TJ = 125 °C -30 -1 -1.7 -3 ±100 -1 -10 µA nA V LIMITS UNIT MIN TYP MAX REV 1.3 1 Jun-22-2010 Datasheet pdf – http://www.DataSheet4U.net/ www.DataSheet.co.kr NIKO-SEM P-Channel Logic Level Enhancement Mode P1403EVG SOP-8 Field Effect Transistor Halogen-Free & Lead-Free 14 9 28 22 14 VGS = -4.5V, ID = -9A VGS = -10V, ID = -12A VDS = -10V, ID = -12A DYNAMIC Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Total Gate Charge 2 Drain-Source On-State 1 Resistance Forward Transconductance 1 RDS(ON) gfs mΩ S Ciss Coss Crss Rg Qg(VGS=10V) Qg(VGS=4.5V) VDS = 0.5V(BR)DSS, VGS = -10V, ID = -12A 2 2510 VGS = 0V, VDS = -15V, f = 1MHz 449 349 VGS = 0V, VDS = 0V, f = 1MHz 7.3 48 26 7 9 12 VDS = -15V, ID ≅ -1A, VGS = -10V, RGS = 6Ω 16 50 100 nS nC Ω pF Gate-Source Charge Gate-Drain Charge 2 2 Qgs Qgd Turn-On Delay Time Rise Time 2 td(on) tr Turn-Off Delay Time Fall Time 2 2 td(off) tf SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TA = 25 °C) Continuous Current Forward Voltage 1 2 1 IS VSD IF = IS, VGS = 0V -2.1 -1.2 A V Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%. Independent of operating temperature. REMARK: THE PRODUCT MARKED WITH “P1403EVG”, DATE CODE or LOT # REV 1.3 2 Jun-22-2010 Datasheet pdf – http://www.DataSheet4U.net/ www.DataSheet.co.kr NIKO-SEM P-Channel Logic Level Enhancement Mode P1403EVG SOP-8 Field Effect Transistor Halogen-Free & Lead-Free Output Characteristics 50 V GS = 10V On-Resistance VS Drain Current 0.040 -ID, Drain-To-Source Current(A) RDS(ON)ON-Resistance(OHM) V GS = 4.5V 40 V GS = 7V 30 V GS = 3V 0.035 0.030 0.025 0.020 0.015 0.010 0.005 0 V GS = 10V V GS = 4.5V 20 10 0 1 2 3 4 5 -VDS, Drain-To-S […]

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P1403EVG Datasheet


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