Z1051PI – 3A, Synchronous Buck Regulator (AOZ1051PI)

Part Number : Z1051PI, AOZ1051PI

Function : 3A, Synchronous Buck Regulator

Manufactures : Alpha & Omega Semiconductors

Images :

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Z1051PI image

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Description :

AOZ1051PI EZBuck™ 3 A Synchronous Buck Regulator General Description The AOZ1051PI is a high efficiency, easy to use, 3 A synchronous buck regulator. The AOZ1051PI works from 4.5 V to 18 V input voltage range, and provides up to 3 A of continuous output current with an output voltage adjustable down to 0.8 V. The AOZ1051PI comes in an exposed pad SO-8 package and is rated over a -40 °C to +85 °C operating ambient temperature range. Features z 4.5 V to 18 V operating input voltage range z Synchronous Buck: 70 mΩ internal high-side switch and 40 mΩ internal low-side switch (at 12 V) z Up to 95 % efficiency z External soft start z Output voltage adjustable to 0.8 V z 3 A continuous output current z 500 kHz PWM operation z Cycle-by-cycle current limit z Pre-bias start-up z Short-circuit protection z Thermal shutdown z Exposed pad SO-8 package Applications z Point of load DC/DC converters z LCD TV z Set top boxes z DVD and Blu-ray players/recorders z Cable modems Typical Application VIN C1 10µF CSS VIN EN SS L1 4.7µH AOZ1051PI LX R1 VOUT COMP RC CC FB AGND PGND R2 C2, C3 22µF Figure 1. 3.3 V 3 A Synchronous Buck Regulator, Fs = 500 kHz Rev. 1.0 June 2011 www.aosmd.com Page 1 of 14 Free Datasheet http:/// AOZ1051PI Ordering Information Part Number AOZ1051PI Ambient Temperature Range -40 °C to +85 °C Package EPAD SO-8 Environmental Green Product AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information. Pin Configuration PGND VIN AGND FB 1 2 3 4 8 7 6 5 NC SS EN COMP PAD (LX) Exposed Pad SO-8 (Top View) Pin Description Pin Number 1 2 3 4 5 6 7 8 Exposed pad Pin Name PGND VIN AGND FB COMP EN SS NC LX Pin Function Power ground. PGND needs to be electrically connected to AGND. Supply voltage input. When VIN rises above the UVLO threshold and EN is logic high, the device starts up. Analog ground. AGND is the reference point for controller section. AGND needs to be electrically connected to PGND. Feedback input. The FB pin is used to set the output voltage via a resistive voltage divider between the output and AGND. External loop compensation pin. Connect a RC network between COMP and AGND to compensate the control loop. Enable pin. Pull EN to logic high to enable the device. Pull EN to logic low to disable the device. If on/off control in not needed, connect EN to VIN and do not leave it open. Soft-start pin. 5 µA current charging current. No Connect Pin. Pin 8 is not internally connected. Connect this pin externally to LX and use it for better thermal performance. Switching node. LX is the drain of the internal PFET. LX is used as the thermal pad of the power stage. Rev. 1.0 June 2011 www.aosmd.com Page 2 of 14 Free Datasheet http:/// AOZ1051PI Block Diagram VIN EN UVLO & POR 5V LDO Regulator Internal +5V OTP + Reference & Bias ISen Softstart ILimit – Q1 […]

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Z1051PI Datasheet

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