The RTL8111E supports the PCI Express 1.1 bus interface for host communications with power
management, and is compliant with the IEEE 802.3u specification for 10/100Mbps Ethernet and the IEEE 802.3ab specification for 1000Mbps Ethernet.
The Device supports the PCI Express 1.1 bus interface for host communications with power management, and is compliant with the IEEE 802.3u specification for 10/100Mbps Ethernet and the IEEE 802.3ab specification for 1000Mbps Ethernet. It also supports an auxiliary power auto-detect function, and will auto-configure related bits of the PCI power management registers in PCI configuration space.
The Device features embedded One-Time-Programmable (OTP) memory to replace the external EEPROM (93C46/93C56/93C66).
The RTL8196E is an integrated System-on-a-Chip(SoC) Application Specific Integrated Circuit (ASIC) L2 5-Port Ethernet switch. An RLX4181 CPU is embedded and the clock rate can be up to 400MHz. To improve computational performance, a 16Kbyte I-Cache, 8Kbyte D-Cache, 16Kbyte I-MEM, and 8Kbyte D-MEM are provided. A standard 5-signal P1149.1 compliant EJTAG test interface is supported for CPU testing and software development.
The device provides five ports (ports 0~4), integrated with fivephysical layer transceivers for 10Base-T and 100Base-TX. Each port of the RTL8196E may be configured as a LAN or WAN port. The RTL8196E supports flexible IEEE 802.3x full-duplex flow control and optional half-duplex backpressure control. For full-duplex, standard IEEE 803.3x flow control will enable pause ability only when both sides of UTP have auto-negotiation ability and have enabled pause ability. The RTL8196E also provides optional forced mode IEEE 802.3x full-duplex flow control. Based on optimized packet memory management, the RTL8196E is capableof Head-Of-Line blocking prevention.