EPM3032ALC44-10 Datasheet PDF

Part Number : EPM3032ALC44-10

Function : Programmable logic , 32 macrocells, 2 logic array blocks, 34 I/O pins, 10ns

Manufacturers : Altera Corporation

Pinouts :

EPM3032ALC44-10 datasheet

Description :


■ High–performance, low–cost CMOS EEPROM–based programmable logic devices (PLDs) built on a MAX architecture
■ 3.3-V in-system programmability(ISP) through the built–in IEEE Std. 1149.1 Joint Test ActionGroup (JTAG) interface with advanced pin-locking capability
– ISP circuitry compliant with IEEE Std. 1532
■ Built–in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990
■ Enhanced ISP features:
– Enhanced ISP algorithm for faster programming
– ISP_Done bit to ensure complete programming
– Pull-up resistor on I/O pinsduring in–system programming
■ High–density PLDs ranging from 600 to 10,000 usable gates
■ 4.5–ns pin–to–pin logic delays with counter frequencies of up to 227.3 MHz
■ MultiVolt I/O interface enabling the device core to run at 3.3 V, while I/O pins are compatible with 5.0–V, 3.3–V, and 2.5–V logic levels

EPM3032ALC44-10 Datasheet PDF Download

EPM3032ALC44-10 pdf

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