QS5LV91970J Datasheet PDF – PLL Clock Driver

Part Number : QS5LV91970J

Function : 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER

Package : QSOP 20 Pin Type, PLCC 28 Pin Type

Manufacturers : Integrated Device Technology

Pinouts :

QS5LV91970J datasheet

 

Description :

The QS5LV919, QS5LV91970J Clock Driver uses an internal phase locked loop (PLL) to lock low skew outputs to one of two reference clock inputs. Eight outputs are available: 2xQ, Q0-Q4, Q5, Q/2. Careful layout and design ensure < 300 ps skew between the Q0-Q4, and Q/2 outputs.
The QS5LV919 includes an internal RC filter which provides excellent jitter characteristics and eliminates the need for external components.

Features :

• 3.3V operation

• JEDEC compatible LVTTL level outputs

• Clock inputs are 5V tolerant

• < 300ps output skew, Q0–Q4

• 2xQ output, Q outputs, Q output, Q/2 output

• Outputs 3-state and reset while OE/RST low

• PLL disable feature for low frequency testing

• Internal loop filter RC network

• Functional equivalent to MC88LV915, IDT74FCT388915

 

QS5LV91970J Datasheet PDF Download


QS5LV91970J pdf

Other data sheets within the file : QS5LV91970, QS5LV919