DM74LS191N Datasheet PDF – 4-Bit Binary Counter

Part Number : DM74LS191N

Function : Synchronous 4-Bit Binary Counter

Manufacturers : Fairchild Semiconductor


DM74LS191N Binary Counter


Description :

The DM74LS191 circuit is a synchronous, reversible, up/down counter. Synchronous operation is provided by having all flip-flops clocked simultaneously, so that the outputs change simultaneously when so instructed by the steering logic. This mode of operation eliminates the output count ing spikes normally associated with asynchronous (ripple clock) counters.

The outputs of the four master-slave flip-flops are triggered on a low-to-high level transition of the clock input, if the enable input is low. A high at the enable input inhibits counting. Level changes at either the enable input or the down/ up input should be made only when the clock input is high. The direction of the count is determined by the level of the down/up input. When low, the counter counts up and when high, it counts down.


1. Counts 8-4-2-1 BCD or binary
2. Single down/up count control line
3. Count enable control input
4. Ripple clock output for cascading
5. Asynchronously presettable with load control
6. Parallel outputs
7. Cascadable for n-bit applications
8. Average propagation delay 20 ns
9. Typical clock frequency 25 MHz
10. Typical power dissipation 100 mW


DM74LS191N Datasheet PDF Download

DM74LS191N pdf

Other data sheets within the file : 74LS191, 74LS191M, 74LS191N, DM74LS191, DM74LS191M

74LS190 Datasheet – Synchronous 4-Bit Binary Counter

Part Number : 74LS190

Function : Synchronous 4-Bit Binary Counters

Package : DIP 16 Pin

Manufacturers : Motorola => Freescale

Pinouts :

74LS190 datasheet


Description :

The SN54/74LS190 is a synchronous UP/DOWN BCD Decade (8421) Counter and the SN54/74LS191 is a synchronous UP/DOWN Modulo-16 Binary Counter. State changes of the counters are synchronous with the LOW-to-HIGH transition of the Clock Pulse input. An asynchronous Parallel Load (PL) input overrides counting and loads the data present on the Pn inputs into the flip-flops, which makes it possible to use the circuits as programmable counters. A Count Enable (CE) input serves as the carry /borrow input in multi-stage counters. An Up/Down Count Control (U/D) input determines whether a circuit counts up or down. A Terminal Count (TC) output and a Ripple Clock (RC) output provide overflow/underflow indication and make possible a variety of methods for generating carry/borrow signals in multistage counter applications

• Low Power . . . 90 mW Typical Dissipation
• High Speed . . . 25 MHz Typical Count Frequency
• Synchronous Counting
• Asynchronous Parallel Load
• Individual Preset Inputs
• Count Enable and Up/Down Control Inputs
• Cascadable
• Input Clamp Diodes Limit High Speed Termination Effects

74LS190 Datasheet PDF Download

74LS190 pdf

Other data sheets within the file : 54LS190J, 54LS191J, 74LS190, 74LS190D, 74LS190N