SN74ALVTH16827VR Datasheet PDF – 20-Bit Buffer / Driver

Part Number : SN74ALVTH16827VR

Function : 2.5-V/3.3-V 20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Package : TVSOP 56 Pin Type

Manufacturers : Texas Instruments

Pinouts :

SN74ALVTH16827VR datasheet

 

Description :

The SN74ALVTH16827VR, 74ALVTH16827 devices are 20-bit buffers/line drivers designed for 2.5-V or 3.3-V VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

The devices are composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1and 1OE2, or 2OE1and 2OE2) inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state.

When VCC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

Features :

1. State-of-the-Art Advanced BiCMOS Technology (ABT) WidebusE Design for 2.5-V and 3.3-V Operation and Low Static Power Dissipation

2. Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC)

 

SN74ALVTH16827VR Datasheet PDF Download


SN74ALVTH16827VR pdf

Other data sheets within the file :

74ALVTH16827DLG4, 74ALVTH16827DLRG4, 74ALVTH16827GRE4,

74ALVTH16827GRG4, 74ALVTH16827VRE4

SN74ABT5401DW Datasheet – 11-bit Buffer and Line Driver

Part Number : SN74ABT5401DW

Function : 11-BIT LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS

Package : SOP 28 Pin Type

Manufacturers : Texas Instruments

Pinouts :

SN74ABT5401DW datasheet

 

Description :

These 11-bit buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1or OE2) input is high, all 11 outputs are in the high-impedance state. These devices provide inverted data.

Features :

1. Output Ports Have Equivalent 25-W Series Resistors, So No External Resistors Are
Required
2. State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation
3.  Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17

 

SN74ABT5401DW Datasheet PDF Download


SN74ABT5401DW pdf

Other data sheets within the file :

54ABT5401, 74ABT5401, SN54ABT5401, 74ABT5401DW, SN54ABT5401DWR