74AC245 Datasheet PDF – Octal BUS Transceiver

Part Number : 74AC245


Package : DIP 20, PLCC 20 Pin

Manufacturers : Texas Instruments

Pinouts :

74AC245 datasheet



The 74AC245 octal bus transceivers are designed for asynchronous two-way communication
between data buses. The control-function implementation minimizes external timing
requirements. When the output-enable (OE) is low, the device passes noninverted data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction control (DIR) input.

A high on (OE) disables the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OEshould be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.


1. 2-V to 6-V VccOperation
2. Inputs Accept Voltages to 6 V
3. Max tpd of 7 ns at 5 V


74AC245 Datasheet PDF Download

74AC245 pdf

Other data sheets within the file : SN74AC245, 54AC245, SN54AC245,

SN74AC245N, SN74AC245DW, SN74AC245DWR

24C64WP Datasheet – 64 Kbit Serial I2C Bus EEPROM – ST

Part Number : 24C64WP, M24C64-WMN6TP

Function : 64-Kbit serial I2C bus EEPROM

Package : SOP 8 Pin Type

Manufacturers : STMicroelectronics

Image :

24C64WP image


1. Two-Wire I2C Serial Interface Supports 400kHz Protocol

2. Single Supply Voltage:
(1) 4.5 to 5.5V for M24Cxx
(2) 2.5 to 5.5V for M24Cxx-W
(3) 1.8 to 5.5V for M24Cxx-R

3. Write Control Input

4. BYTE and PAGE WRITE (up to 32 Bytes)


6. Self-Timed Programming Cycle

7. Automatic Address Incrementing

8. Enhanced ESD/Latch-Up Protection

9. More than 1 Million Erase/Write Cycles

10. More than 40-Year Data Retention


Marking Information

24C64WP Marking
Reference PDF : http://www.anglia.com/registration/pcn_ptn/docs/pcn/5902.pdf

Description for 24C64WP

These I2C-compatible electrically erasable programmable memory (EEPROM) devices are organized as 8192 x 8 bits (M24C64) and 4096 x 8 bits (M24C32). I2C uses a two-wire serial interface, comprising a bi-directional data line and a clock line. The devices carry a built-in 4-bit Device Type Identifier code (1010) in accordance with the I2C bus definition. The device behaves as a slave in the I2C protocol, with all memory operations synchronized by the serial clock. Read and Write operations are initiated by a Start condition, generated by the bus master.



24C64WP Datasheet

24C64WP Datasheet

24C64WP pdf

Other data sheets within the file : M24C64, M24C64-W, M24C64-R