LMK04906 Datasheet PDF – Clock Jitter Cleaner

Part Number : LMK04906

Function : Ultra Low Noise Clock Jitter Cleaner/Multiplier with 6 Programmable Outputs

Package : 64-Pin WQFN (9.0 x 9.0 x 0.8 mm) Type

Manufacturers : Texas Instruments

Pinouts :

LMK04906 datasheet


Description :

The LMK04906 is the industry’s highest performance clock jitter attenuator with superior clock jitter cleaning, generation, and distribution with advanced features to meet high performance timing application needs.

The device accepts 3 clock input ranging from 1 kHz to 750 MHz and generates 6 unique clock output frequencies ranging from 2.26 MHz to 2.6 GHz. The LMK04906 can also buffer a crystal or VCXO to generate a 7th unique clock frequency.

The device provides virtually all frequency translation combination required for SONET, Ethernet, Fibre Channel and multi-mode Wireless Base Stations.

Features :

1. Ultralow RMS Jitter Performance

(1) 100-fs RMS Jitter (12 kHz to 20 MHz)

(2) 123-fs RMS Jitter (100 Hz to 20 MHz)

2. Dual Loop PLLatinum PLL Architecture

LMK04906 Datasheet PDF Download

LMK04906 pdf

Other data sheets within the file :


LMK00334 Datasheet PDF – Clock Buffer and Level Translator

Part Number : LMK00334

Function : 4-Output Lock Buffer / Level Translator

Package : WQFN (RTV) 32 Pin Type

Manufacturers : Texas Instruments

Pinouts :

LMK00334 datasheet


Description :

The LMK00334 is a 4-output HCSL fanout buffer intended for high-frequency, low-jitter clock/data distribution and level translation. The input clock can be selected from two universal inputs or one crystal input. The selected input clock is distributed to two banks of 2 HCSL outputs and one LVCMOS output.

The LVCMOS output has a synchronous enable input for runt-pulse-free operation when enabled or disabled. The IC operates from a 3.3 V core supply and 3 independent 3.3 V/2.5 V output supplies.

The device provides high performance, versatility, and power efficiency, making it ideal for replacing fixed-output buffer devices while increasing timing margin in the system.

Features :

1. One crystal input accepts a 10- to 40-MHz crystal or single-ended clock

2. Two banks with two differential outputs each

3. Additive RMS phase jitter for PCIe Gen5 at 100 MH


LMK00334 Datasheet PDF Download

LMK00334 pdf

Other data sheets within the file : LMK00334RTVR, LMK00334RTVT