47C201P Datasheet – CMOS 4-Bit Microcontroller

Part Number : 47C201P

Function : CMOS 4-Bit Microcontroller

Package : DIP 16 Pin Type

Manufacturers : Toshiba

Image :

47C201P datasheet


Description :

The TMP47C101, 47C201P are high speed and high performance 4-bit single chip microcomputers, intergarting ROM, RAM, input / output ports and timer / counters on a chip.

The  TMP47C101, TMP47C201 are the standard LSI in the TLCS-47E series. In addition, they have the output port with LED direct drive capability.


Pinouts :

47C201P pinouts


1. 4-bit single chip microcomputer

2. Instruction execution time: 1.3µs (at 6MHz)

3. Low voltage operation: 2.2V (at 2MHz RC)

4. ROM table look-up instructions

5. Subroutine nesting: 15 levels max.

6. 5 interrupt sources (External: 2, Internal : 3 )

7. Real Time Emulator: BM4721A + BM1160 (for DIP)


Other data sheets within the file : 47C101M, 47C101P, 47C201M, 47P201VP,

TMP47C101P, TMP47C201P, TMP47C101M, TMP47C201M


47C201P Datasheet PDF Download

47C201P pdf

PCA9517 Datasheet PDF – Level translating I2C-bus repeater

Part Number : PCA9517

Function : Level translating I2C-bus repeater

Package : SO8 and TSSOP8

Manufacturers : NXP Semiconductors.

PCA9517 Pinouts

PCA9517 datasheet


General description

The PCA9517 is a CMOS integrated circuit that provides level shifting between low voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.
While retaining all the operating modes and features of the I2C-bus system during the level shifts, it also permits extension of the I2C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Using the PCA9517 enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are over voltage tolerant and are high-impedance when the PCA9517 is unpowered.

The 2.7 V to 5.5 V bus B-side drivers behave much like the drivers on the PCA9515A device, while the adjustable voltage bus A-side drivers drive more current and eliminate the static offset voltage. This results in a LOW on the B-side translating into a nearly 0 V LOW on the A-side which accommodates smaller voltage swings of lower voltage logic.

The static offset design of the B-side PCA9517 I/O drivers prevent them from being connected to another device that has rise time accelerator including the PCA9510, PCA9511, PCA9512, PCA9513, PCA9514, PCA9515A, PCA9516A, PCA9517 (B-side), or PCA9518. The A-side of two or more PCA9517s can be connected together, however, to allow a star topography with the A-side on the common bus, and the A-side can be connected directly to any other buffer with static or dynamic offset voltage. Multiple PCA9517s can be connected in series, A-side to B-side, with no build-up in offset voltage with only time of flight delays to consider.


1. 2 channel, bidirectional buffer isolates capacitance and allows 400 pF on either side of the device
2. Voltage level translation from 0.9 V to 5.5 V and from 2.7 V to 5.5 V
3. Footprint and functional replacement for PCA9515/15A
4. I2C-bus and SMBus compatible
5. Active HIGH repeater enable input
6. Open-drain input/outputs
7. Lock-up free operation
8. Supports arbitration and clock stretching across the repeater
9. Accommodates Standard mode and Fast mode I2

PCA9517 Datasheet PDF Download

PCA9517 pdf

Other data sheets within the file : PCA9517D, PCA9517DP