Hi3531 Datasheet – H.264 Codec Processor ( PDF )

Part Number: Hi3531

Function: H.264 Codec Processor

Package: 25mm x 25mm and a pitch of 0.65mm Type ( 817 pins )

Manufacturer: Hisilicon Technologies


Hi3531 Codec Processor


The Hi3531 is a professional high-performance SoC designed for multi-channel D1 and HD DVR and NVR. With the embedded high-performance dual-core A9 processor, H264 codec engine (supporting a maximum of 5-channel 1080p real-time codec complying with multiple protocols), and dedicated TOE network acceleration module, the Hi3531 meets the rising demand for HD and network applications. The Hi3531 also provides outstanding video pre-processing and post-processing features, various codec algorithms, and multi-channel HD output capability. These features guarantee users a high-quality image experience. In addition, the Hi3531 supports multiple integrated peripheral interfaces to meet customer requirements for functionality, features, and image quality, while reducing the cost. By
using the dedicated video cascade technology, Hi3531s and Hi3532s can be cascaded to provide superior encoding and decoding capabilities.

Key Specifications:

1. Processor
(1) ARM Cortex A9 dual cores
− Up to 930 MHz
− 32 KB I-cache and 32 KB D-cache
− 256 KB L2 cache

2. Video and Graphic Processing
(1) 3D de-interlacing, image enhancement, edge enhancement, and 3D denoise
(2) Anti-flicker
(3) 1/16x to 8x video scaling
(4) 1/2x to 2x graphic scaling
(5) OSD overlay of eight regions
(6) Alpha blending of the video layer and graphics layers

Block Diagram
Hi3531 datasheet pdf

Typical Applications:

1. DVRs with a Single Hi3531
(1) 16D1+16CIF Encoding+4D1 Decoding DVR

– 16D1+16CIF dual streams real-time encoding +16 fps D1 JPEG snapshot+4D1 real-time decoding

(2) 8D1 Simultaneous Encoding and Decoding DVR

– 16D1+16CIF dual streams real-time encoding +16 fps D1 JPEG snapshot+4D1 real-time decoding 4-Channel HD Simultaneous Encoding and Decoding DVR

(3) 4x720p+4xQVGA dual streams real-time encoding +4 fps 720p JPEG snapshot+4x720p real-time decoding


Hi3531 Datasheet PDF Download


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TPS65950 Datasheet PDF – Power Management / Audio Codec

Part Number: TPS65950

Function: Integrated Power Management / Audio Codec

Package: PGA 209 Pin, 7 × 7 mm Type

Manufacturer: Texas Instruments


TPS65950 datasheet



The TPS65950 device is a highly integrated power-management and audio coder/decoder (codec) integrated circuit (IC) that supports the power and peripheral requirements of the OMAP™ application processors. The device contains power management, an audio codec, a universal serial bus (USB) high-speed (HS) transceiver, an ac/USB charger, light-emitting diode (LED) drivers, an an alog-to-digital converter (ADC), a real-time clock (RTC), and embedded power control.

The power portion of the device contains three buck converters, two controllable by a  dedicated SmartReflex™ class-3 interface, multiple low-dropout (LDO) regulators, an embedded power controller (EPC) to manage the power-sequencing requirements of OMAP, and an RTC and backup module. The RTC can be powered by a backup battery when the main supply is not present, and the device contains a coin-cell charger to recharge the backup battery as needed.


TPS65950 Datasheet PDF Download

TPS65950 pdf

Other data sheets are available within the file:

TPS65950A2ZXN, TPS65950A2ZXNR, TPS65950A3ZXN, TPS65950A3ZXNR