1. Internal Look-Ahead for fast counting
2. Carry output for n-bit cascading
3. Synchronous couting
4. Synchronously programmable
5. Load control line
6. Diode-clamped inputs
Other data sheets within the file : SN54160, SN54161, SN54162, SN54163, SN54LS160A
The CD54HC40103 and CD74HCT40103 are manufactured with high speed silicon gate technology and consist of an 8-stage synchronous down counter with a single output which is active when the internal count is zero. The 40103 contains a single 8-bit binary counter. Each has control inputs for enabling or disabling the clock, for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously. All control inputs and the TC output are active-low logic. In normal operation, the counter is decremented by one count on each positive transition of the CLOCK (CP). Counting is inhibited when theTE input is high. The TC output goes low when the count reaches zero if the TE input is low, and remains low for one full clock period.
Features
• Synchronous or Asynchronous Preset
• Cascadable in Synchronous or Ripple Mode
• Fanout (Over Temperature Range)
– Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
– Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
– 2V to 6V Operation
– High Noise Immunity: NIL= 30%, NIH= 30% of VCC at VCC= 5V
• HCT Types
– 4.5V to 5.5V Operation
– Direct LSTTL Input Logic Compatibility,VIL= 0.8V (Max), VIH= 2V (Min)
– CMOS Input ompatibility, Il ≤1µA at VOL, VOH
