The 74HC139, 74HCT139 decodes two binary weighted address inputs (nA0, nA1) to four mutually exclusive outputs (nY0 to nY3). Each decoder features an enable input (nE).
When nEis HIGH all outputs are forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
1. Demultiplexing capability
2. Two independent 2-to-4 decoders
3. Multifunction capability
4. Active LOW mutually exclusive outputs
5. Output capability: standard
6. ICC category: MSI
1. Memory decoding or data-routing
2. Code conversion
Other data sheets within the file : 74HC139D, 74HC139DB, 74HC139N, 74HC139PW, 74139
The 74HC4851-Q100, 74HCT4851-Q100 are high-speed Si-gate CMOS devices and are specified in compliance with JEDEC standard no. 7A.
The devices are 8-channel analog multiplexers/demultiplexers with three digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). The devices feature injection-current effect control, which has excellent value in automotive applications where voltages in excess of the supply voltage are common.