This is 256 kilobit CMOS 12.0 volt, bulk erase flash memory with embedded algorithms.
The device is a 256K Flash memory organized as 32K bytes of 8 bits each. AMD Flash memories offer the most cost-effective and reliable read/write non- volatile random access memory. The Am28F256A is packaged in 32-pin PDIP, PLCC, and TSOP versions. It is designed to be reprogrammed and erased in-system or in standard EPROM programmers. The Am28F256A is erased when shipped from the factory.
The AM29F400AB-150FC is a 4 Mbit, 5.0 Volt-only Flash memory organized as 512 Kbytes of 8 bits each or 256 Kwords of 16 bits each. The 4 Mbits of data is divided into 11 sectors of one 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and seven 64 Kbytes, for flexible erase capability. The 8 bits of data will appear on DQ0–DQ7 or 16 bits on DQ0–DQ15. The Am29F400A is offered in 44-pin SO and 48-pin TSOP packages. This device is designed to be programmed in-system with the standard system 5.0 Volt VCCsupply. 12.0 Volt VPPis not required for program or erase operations. The device can also be reprogrammed in standard EPROM programmers.
1. 5.0 V ±10% for read and write operations
(1) Minimizes system level power requirements
2. Compatible with JEDEC-standards
(1) Pinout and software compatible with single-power-supply flash
(2) Superior inadvertent write protection
3. Package options
(1) 44-pin SO
(2) 48-pin TSOP
4. Minimum 100,000 write/erase cycles guaranteed
5. High performance
(1) 60 ns maximum access time
6. Sector erase architecture
(1) One 16 Kbyte, two 8 Kbytes, one 32 Kbyte, and seven 64 Kbytes
(2) Any combination of sectors can be erased. Also supports full chip erase.
7. Sector protection
(1) Hardware method that disables any combination of sectors from write or erase operations. Implemented using standard PROM programming equipment.
8. Embedded EraseAlgorithms
(1) Automatically preprograms and erases the chip or any sector
9. Embedded ProgramAlgorithms
(1) Automatically programs and verifies data at specified address
10. DataPolling and Toggle Bit feature for detection of program or erase cycle completion
11. Ready/Busyoutput (RY/BY)
(1) Hardware method for detection of program or erase cycle completion
12. Erase Suspend/Resume
(1) Supports reading data from a sector not being erased
13. Low power consumption
(1) 20 mA typical active read current for Byte Mode
(2) 28 mA typical active read current for Word Mode
(3) 30 mA typical program/erase current
14. Enhanced power management for standby mode
(1) 1 µA typical standby current
15. Boot Code Sector Architecture
(1) T = Top sector
(2) B = Bottom sector
16 .Hardware RESET pin
(1) Resets internal state machine to the read mode