88E6218 Datasheet PDF – Link Street Gateway Router

Part Number : 88E6218

Function : Link Street Integrated Gateway Router with Multi-Port QoS Switch

Package : LQFP 216 Pin Type

Manufacturers : Marvell Semiconductor

Images :

88E6218 datasheet


Description :

The Link Street 88E6218 device is an advanced single-chip gateway router integrating a high-performance ARM9E CPU at up to 150 MHz for full-wire-speed routing, providing additional CPU bandwidth for network management and security functions, plus a 6-port Fast Ethernet (FE) switching fabric with Quality of Service (QoS) support, and an additional MII port to extend the gateway/router to another network. The Link Street 88E6218 device also contains all the FE PHY integration and Virtual Cable Tester advantages of the 88E6208 device.

Block Diagram


1. Full-wire-speed 100 Mbps WAN/LAN routing, plus a faster CPU providing bandwidth for software VPN services
2. ARM9E CPU at up to 150 MHz (ARM9E CPU with DSP processor instruction extensions)
3. High-performance cache memory architecture with 8 KB instruction cache, 8 KB data cache, and 8 KB tightly coupled memory
4. QoS enhanced 6-port FE switch including UniMAC™ IP routing acceleration for video-over-the-Internet and audio-over-the-Internet delivery
5. External MII port, which can run up to 200 Mbps full-duplex, providing network expansion capability to an additional multiport switch or wireless LAN

Reference PDF : https://github.com/chrisforbes/ijwrouter/blob/master/doc/88E6218%20Datasheet%20(1%20of%203).PDF

Other data sheets within the file : E6218

88E6218 Datasheet PDF Download

88E6218 pdf


74HC74 Datasheet PDF – Dual D-type Flip-Flop

Part Number : 74HC74

Function : Dual D-Type Positive-Edge-Triggered Flip-Flop

Package : 14 Pin DIP, SO, SOIC, TSSOP, CIP

Manufacturers : NXP, TI, Philips, ON Semiconductor

74HC74 Flip-Flop


The 74HC74 is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with individual Set, Reset, and Clock inputs. Information at a D−input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q outputs are available from each flip−flop. The Set and Reset inputs are asynchronous.

Truth Table
74HC74 truth table


1. Output Drive Capability: 10 LSTTL Loads
2. Outputs Directly Interface to CMOS, NMOS, and TTL
3. Operating Voltage Range: 2.0 to 6.0 V
4. Low Input Current: 1.0 A
5. High Noise Immunity Characteristic of CMOS Devices
6. In Compliance with the JEDEC Standard No. 7A Requirements


Pinouts :
74HC74 datasheet pinout


The 74AHC74, 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.

The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has complementary outputs (Q andQ).


7474 Datasheet PDF Download

74HC74 pdf

Other data sheets within the file : 74HC74BQ, 74HC74CU, 74HC74D, 74HC74N, SN74HC74N