YM3812 Datasheet – FM Operator – Yamaha

Part Number : YM3812

Function : FM Operator TYPE-LII ( OPL II )

Package : 24 Pin DIP or SOP type

Manufacturers : Yamaha


YM3812 FM Operator
Description :

The OPLII ( FM OPERATOR type-LII) is an LSI IC which can be used as a sound generation system for computer apparatus,teletext instruments, etc. The OPLII employs frequency modulation for the melody sounds, and has rhythm sounds very close to those of natural musical instruments, marking it possible to synthesize various tones by software control from a CPU.


YM3812 pinout


1. FM sound generation system for realistic sound
2. Built-in vibrato oscillator/amplitude modulation oscillator ( AM )
3. Composite sine wave speech synthesis also possible
4. 5V single power supply

Reference Site :

1. https://en.wikipedia.org/wiki/Yamaha_YM3812
2. https://www.youtube.com/watch?v=z3DU2mNBa6M&t=10m11s


YM3812 Datasheet PDF Download

YM3812 pdf



74HC74 Datasheet PDF – Dual D-type Flip-Flop

Part Number : 74HC74

Function : Dual D-Type Positive-Edge-Triggered Flip-Flop

Package : 14 Pin DIP, SO, SOIC, TSSOP, CIP

Manufacturers : NXP, TI, Philips, ON Semiconductor

74HC74 Flip-Flop


The 74HC74 is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with individual Set, Reset, and Clock inputs. Information at a D−input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q outputs are available from each flip−flop. The Set and Reset inputs are asynchronous.

Truth Table
74HC74 truth table


1. Output Drive Capability: 10 LSTTL Loads
2. Outputs Directly Interface to CMOS, NMOS, and TTL
3. Operating Voltage Range: 2.0 to 6.0 V
4. Low Input Current: 1.0 A
5. High Noise Immunity Characteristic of CMOS Devices
6. In Compliance with the JEDEC Standard No. 7A Requirements


Pinouts :
74HC74 datasheet pinout


The 74AHC74, 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.

The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has complementary outputs (Q andQ).


7474 Datasheet PDF Download

74HC74 pdf

Other data sheets within the file : 74HC74BQ, 74HC74CU, 74HC74D, 74HC74N, SN74HC74N