24AA08 Datasheet PDF – 8Kb I2C 2-wire Serial EEPROM

Part Number : 24AA08

Function : 8K 1.8V I2C EEPROM

Package : 8 Pin SOIC, DFN, PDIP, UDFN

Manufacturers : Microchip Technology

Pinouts :

24AA08 datasheet

 

Description :

The Microchip Technology Inc. 24AA08/24LC08B (24XX08*) is a 8 Kbit Electrically Erasable PROM. The device is organized as four blocks of 256 x 8-bit memory with a 2-wire serial interface. Low-voltage design permits operation down to 1.7V, with standby and active currents of only 1 μA and 1 mA, respectively. The 24XX08 also has a page write capability for up to 16 bytes of data. The 24XX08 is available in the standard 8-pin PDIP, surface mount SOIC, TSSOP, 2×3 DFN, 2×3 TDFN and MSOP packages, and is also available in the 5-lead SOT-23 package. All packages are Pb-free and RoHS compliant.

Features

1. Single Supply with Operation down to 1.7V for 24AA08 and 24FC08 Devices, 2.5V for 24LC08B Devices
2 Low-Power CMOS Technology:
– Read current 1 mA, maximum
– Standby current 1 μA, maximum (I-temp.)
3. 2-Wire Serial Interface, I2C Compatible
4. Schmitt Trigger Inputs for Noise Suppression
5. Output Slope Control to Eliminate Ground Bounce
6. 100 kHz, 400 kHz and 1 MHz Compatibility
7. Page Write Time: 5 ms, Maximum
8. Self-Timed Erase/Write Cycle

Other data sheets within the file : 24AA08-/P, 24AA08-/SM, 24AA08-/SN, 24AA08-I/P

24AA08 Datasheet PDF Download


24AA08 pdf

57F68 PDF – BlueTunes ROM QFN – CSR57F68 – CSR

Part Number : 57F68

Function : CSR57F68, BC57F687A05

Package : QFN 68 Pin

Manufactures : ETC, CSR

Images :

57F68 datasheet
Description :

Based on BlueCore 5-Multimedia, the BlueTunes ROM QFN integrates a Bluetooth radio, baseband, DSP, high-quality audio codec, SMPS, LDO and a battery charger for minimal BOM, component count and PCB area. BlueTunes ROM QFN uses advanced DSP features for the latest stereo enhancements and to improve audio quality, including SBC and MP3 decoder, support for FastStream (low-latency codec) and
5‑band EQ.

BlueTunes ROM QFN includes as standard cVc dual and single microphone algorithms for echo and noise suppression. cVc dual-microphone algorithm can provide >30dB of noise suppression in both stationary and dynamic noise conditions such as; babble, road, music and competing voices. In addition an acoustic echo canceller is now integrated into the cVc dualmicrophone solution, further enhancing the far-end
user experience.

57F68 pinout

Auxiliary Features

1. Crystal oscillator with built-in digital trimming
2. Power management includes digital shutdown and wake-up commands with an integrated low-power oscillator for ultra-low power Park/Sniff/Hold mode
3. Clock request output to control external clock
4. On-chip regulators: 1.5V output from 1.8V to 2.7V input
5. On-chip high-efficiency switched-mode regulator : 1.8V output from 2.7V to 4.4V input
6. Power-on-reset cell detects low-supply voltage
7. 10-bit ADC available to applications
8. On-chip 150mA charger for lithium ion/polymer batteries

57F68 Datasheet

PDF File Download : 57F68.pdf