Part Number: IT8718F
Function: Highly Integrated Super I/O, Environment Control
Package: QFP 128 Pin type
Manufacturer: ITE
Images:
1 page
Description
The IT8718F is a Low Pin Count Interface-based highly integrated Super I/O. The IT8718F provides the most commonly used legacy Super I/O functionality plus the latest Environment Control initiatives, such as H/W Monitor, Fan Speed Controller. The device’s LPC interface complies with Intel “LPC Interface Specification Rev. 1.0”.
Environment Control – Low Pin Count Input / Output (EC – LPC I/O) Preliminary Specification V0.3 ITE TECH. INC. Specification subject to Change without notice, AS IS and for reference only. For purchasing, please contact sales representatives. Please note that the IT8718F V0.3 is applicable to C version and future versions. Copyright © 2006 ITE Tech. Inc. Bao Chiao RD., Hsin Tien, Taipei County 231, Taiwan, R.O.C. Phone: Fax: (02) 29126889 (02) 2910-2551, 2910-2552 If you have any marketing or sales questions, please contact: P.Y. Chang, at ITE Taiwan: E-mail: p.y.chang@ite.com.tw, Tel: 886-2-29126889 X6052, Fax: 886-2-29102551 To find out more about ITE, visit our World Wide Web at: http://www.ite.com.tw Or e-mail itesupport@ite.com.tw for more product information/services Revision History Revision History Section 4 5 5 6 7 8 8 8 8 Revision • Table 4-1. Pins Listed in Numeric Order was revised.
• Table 5-3. Pin Description of GPI/O Signals was revised. • In Table 5-6. Pin Description of Infrared Port Signals, added the third and fourth functions for pin 66. • In Table 6-4. General Purpose I/O Group 4 (Set 4), pin 66 was revised. • Table 7-1. Power On Strapping Options was revised. • Table 8-1. Global Configuration Registers was revised. • Table 8-9. GPIO Configuration Registers was revised. • Table 8-10. GPIO Configuration Registers was revised. • In 8.3.5 Configuration Select and Chip Version (Index=22h, Default=01h), the default value was revised from “00h” to “01h” and added “0001b for C version” to the description of bit 3-0. • In 8.3.6 Clock Selection Register (Index=23h, Default=00h), added “Powered by VSB” to the description of bit 3-2. • In 8.3.12 GPIO Set 5 Multi-Function Pin Selection Register (Index=29h, Default=00h), the descr […]