Semiconductor Informations
| 74HC139 Philips - Dual 2-to-4 line decoder/demultiplexer INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC, HCT, HCU, HCMOS Logic Family Specifications The IC06 74HC, HCT, HCU, HCMOS Logic Package Information The IC06 74HC, HCT, HCU, HCMOS Logic Package Outlines 74HC, HCT139 Dual 2-to-4 line decoder, demultiplexer Product speci cation File under Integrated Circuits, IC06 September 1993 Philips Semiconduc |
| 74HC139-Q100 NXP Semiconductors - Dual 2-to-4 line decoder/demultiplexer 74HC139-Q100; 74HCT139-Q100 Dual 2-to-4 line decoder, demultiplexer Rev. 1 19 June 2014 Product data sheet 1. General description The 74HC139-Q100; 74HCT139-Q100 decodes two binary weighted address inputs (nA0, nA1) to four mutually exclusive outputs (nY0 to nY3). Each decoder features an enable input (nE). When nE is HIGH all outputs are forced HIGH. The enable input can be used as the data i |
| 74H00 Quad 2-Input NAND Gate - Fairchild Semiconductor |
| 74H08 Quad 2-Input AND Gate - Fairchild Semiconductor ( t : ) |
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