Semiconductor Informations

File Download: 74LS191.PDF
| 74LS191 Hitachi Semiconductor - Synchronous Up/Down 4-bit Binary Counters(single clock line) 19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 0.05 0° 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0.13 DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 16 9 5.5 1 *0.22 ± 0.05 0.20 ± 0.04 8 0.80 Max 2.20 Max 0.20 7.80 + 0.30 1.15 0° 8° 0.70 ± 0.20 1.27 *0.42 ± 0.08 0.40 ± 0 |
| 74LS191 Fairchild Semiconductor - Synchronous 4-Bit Up/Down Counter with Mode Control DM74LS191 Synchronous 4-Bit Up, Down Counter with Mode Control August 1986 Revised February 1999 DM74LS191 Synchronous 4-Bit Up, Down Counter with Mode Control General Description The DM74LS191 circuit is a synchronous, reversible, up, down counter. Synchronous operation is provided by having all flip-flops clocked simultaneously, so that the outputs change simultaneously when so instructed by |
| 74L74 Dual Positive Edge Triggered D Flip-Flop - National Semiconductor |
| 74LCX00 Low Voltage Quad 2-Input NAND Gate - Fairchild Semiconductor 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs December 2013 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs Features - 5V tolerant inputs - 2.3V 3.6V VCC specifications provided - 5.2ns tPD max. (VCC = 3.3V), 10 A ICC max. - Power down high impedance input |