Semiconductor Informations

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| 74LS74 ON Semiconductor - LOW POWER SCHOTTKY SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a volta |
| 74LS74 Fairchild Semiconductor - Dual Positive-Edge-Triggered D Flip-Flops DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the f |
| 74L74 Dual Positive Edge Triggered D Flip-Flop - National Semiconductor |
| 74LCX00 Low Voltage Quad 2-Input NAND Gate - Fairchild Semiconductor 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs December 2013 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs Features - 5V tolerant inputs - 2.3V 3.6V VCC specifications provided - 5.2ns tPD max. (VCC = 3.3V), 10 A ICC max. - Power down high impedance input |