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Search BSS138 Datasheet (PDF)
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File Download: BSS138.PDF
[ Descriptions ]
| BSS138 Zetex Semiconductors - N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET SOT23 N-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET ISSUE 3 MARCH 1996 PARTMARKING DETAIL 7 SS BSS138 S D G ABSOLUTE MAXIMUM RATINGS. PARAMETER Drain-Source Voltage Continuous Drain Current at Tamb=25°C Pulsed Drain Current Gate-Source Voltage Power Dissipation at Tamb=25°C Operating and Storage Temperature Range SYMBOL VDS ID IDM VGS Ptot Tj:Tstg VALUE 50 200 800 ± 20 360 -55 to +150 SOT2 |
| BSS138 Siemens Semiconductor Group - SIPMOS Small-Signal Transistor (N channel Enhancement mode Logic Level) BSS 138 SIPMOS ® Small-Signal Transistor N channel Enhancement mode Logic Level VGS(th) = 0.8...2.0V Pin 1 G Type BSS 138 Type BSS 138 BSS 138 Pin 2 S Marking SSs Pin 3 D VDS 50 V ID 0.22 A RDS(on) 3.5 Ω Package SOT-23 Ordering Code Q67000-S566 Q67000-S216 Tape and Reel Information E6327 E6433 Maximum Ratings Parameter Drain source voltage Drain-gate voltage Symbol Values 50 50 |
Related Information
| BSS100 SIPMOS Small-Signal Transistor (N channel Enhancement mode Logic Level) - Siemens Semiconductor Group BSS 100 SIPMOS ® Small-Signal Transistor N channel Enhancement mode Logic Level VGS(th) = 0.8...2.0V Pin 1 S Type BSS 100 Type BSS 100 BSS 100 BSS 100 Pin 2 G Marking SS 100 Pin 3 D VDS 100 V ID 0.22 A RDS(on) 6Ω Package TO-92 Ordering Code Q62702-S499 Q62702-S007 Q62702-S206 Tape and |
| BSS100 N-Channel Logic Level Enhancement Mode Field Effect Transistor - Fairchild Semiconductor September 1996 BSS100 , BSS123 N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density proce |
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