Semiconductor Informations

File Download: SN74LS74.PDF
| SN74LS74A ON Semiconductor - LOW POWER SCHOTTKY SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a volta |
| SN74LS748 Motorola Semiconductors - 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The SN54 , 74LS147 and the SN54, 74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order data line is encoded. Both devices have data inputs and outputs which are active at the low logic level. The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero c |
| SN7000 SIPMOS Small-Signal Transistor - Siemens Semiconductor Group SN 7000 SIPMOS ® Small-Signal Transistor N channel Enhancement mode Logic Level VGS(th) = 0.8...2.0V Pin 1 D Type SN 7000 Type SN 7000 SN 7000 Pin 2 G Marking SN 7000 Pin 3 S VDS 60 V ID 0.25 A RDS(on) 5Ω Package TO-92 Ordering Code Q62702-S638 Q62702-S637 Tape and Reel Information |
| SN7002 SIPMOS Small-Signal Transistor - Siemens Semiconductor Group SN 7002 SIPMOS ® Small-Signal Transistor N channel Enhancement mode Logic Level VGS(th) = 0.8...2.0V Pin 1 G Pin 2 S Pin 3 D Type SN 7002 Type SN 7002 VDS 60 V ID 0.19 A RDS(on) 5Ω Package SOT-23 Marking sSG Ordering Code Q67000-S063 Tape and Reel Information E6327 Maximum Ratin |