Fairchild

DMO465R Datasheet – 650V Integrated Power Switch – Fairchild

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Part Number: DMO465R, DM0465R

Function: 650V, Integrated Power Switch

Package: TO-220F-6L Type

Manufacturer: Fairchild

Pinout

DMO465R datasheet

DMO465R

Description

The DMO465R, FSDM0465RE, FSDM0565RE, and FSDM07652RE are an integrated Pulse Width Modulator (PWM) and SenseFET specifically designed for high-performance offline Switch Mode Power Supplies (SMPS) with minimal external components.

This device is an integrated high-voltage power-switching regulator that combines an avalanche-rugged SenseFET with a current mode PWM control block. The PWM controller includes an integrated fixed-frequency oscillator, under-voltage lockout, leading-edge blanking (LEB), optimized gate driver, internal soft-start, temperature-compensated precise-current sources for a loop compensation, and self-protection circuitry.

Compared with a discrete MOSFET and PWM controller solution, it can reduce total cost; component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. This device is a basic platform well suited for cost-effective designs of flyback converters.

DMO465R PDF Datasheet 650V Integrated Power Switch for 48Watt offline flyback converters

Features

1. Internal Avalanche Rugged Sense FET

2. Advanced Burst-Mode Operation Consumes Under 1 Watt at 240VAC&0.5W Load

3. Precision Fixed Operating Frequency (66kHz)

4. Internal Start-up Circuit

5. Improved Pulse-by-Pulse Current Limiting

6. Over Voltage Protection (OVP)

7. Overload Protection (OLP)

8. Internal Thermal Shutdown Function

DMO465R pdf


 

74LS175 Fairchild – D-Type Flip-Flops, 74175 ( Datasheet )

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Part Number: 74LS175, DM74LS175, 74175

Function : Hex/Quad D-Type Flip-Flops with Clear

Package: DIP, SOP, SOIC 16 Pin Type

Manufacturer: Fairchild Semiconductor

Pinout

74LS175 Pinout

Description

These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the quad (175) versions feature complementary outputs from each flip-flop. Information at the D inputs meeting the setup time require ments is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output.

Logic Diagrams

74LS175 Datasheet

Features

1. 74LS174 contains six flip-flops with single-rail outputs

2. 74LS175 contains four flip-flops with double-rail outputs

3. Buffered clock and direct clear inputs

4. Individual data input to each flip-flop

5. Applications include:

(1) Buffer/storage registers

(2) Shift registers

(3 )Pattern generators

6. Typical clock frequency 40 MHz

7. Typical power dissipation per flip-flop 14 mW

74LS175 Datasheet

74LS175 pdf