TDA8961 Datasheet PDF – TV Demodulator / Decoder

Part Number: TDA8961

Function: ATSC Digital Terrestrial TV Demodulator / Decoder

Package: QFP 80 Type

Manufacturer: Philips Electronics ( https://www.nxp.com/ )

Pinouts:

TDA8961 datasheet

 

Description

The TDA8961 is an Advanced Television Systems Committee (ATSC)-compliant demodulator and FEC decoder for reception of 8-VSB modulated signals for terrestrial and cable applications:

1. Terrestrial: reception of 8-VSB modulated signals via standard 6 MHz VHF/UHF terrestrial TV channels (TV channels 2 to 69 in the United States).

2. Cable: reception of 8-VSB modulated signals via standard 6 MHz VHF/UHF cable TV channels.

 

General features :

• One-chip ATSC-compliant demodulator and concatenated trellis (Viterbi)/Reed Solomon decoder with de-interleaver and de-randomizer
• 0.35µm process
• 3.3 V device
• QFP80 package
• Boundary Scan Test (BST)
• 12 MHz external clock
• 36 MHz output for external D/A converter
• Parallel or serial MPEG-2 transport stream output.

8-Vestigial Side Band (VSB) demodulator :

• Accepts 10-bit IF data sampled at 36 MHz
• 6 MHz wide IF signal, centered at 4 MHz
• On-chip digital circuitry for tuner AGC
• Square-root raised-cosine filter with 11.5% roll-off factor
• Fully internal carrier recovery loop
• No need for external voltage controlled crystal oscillator due to internal sample rate converter
• Fully internal symbol timing recovery with programmable loop filters
• Technology to handle dynamic multipath conditions.

 

TDA8961 Datasheet PDF Download


TDA8961 pdf

Other data sheets are available within the file: 8961, TDA-8961

SN74HC42DR Datasheet PDF – Decimal Decoder

Part Number: SN74HC42DR, HC42

Function: 4-LINE TO 10-LINE DECODERS (1 OF 10)

Package: DIP, SOP 16 Pin

Manufacturer: Texas Instruments

Image

SN74HC42DR Decimal Decoder

Features

1. Wide Operating Voltage Range of 2 V to 6 V
2. Outputs Can Drive Up To 10 LSTTL Loads
3. Low Power Consumption, 80-μA Max ICC
4. Typical tpd = 14 ns
5. ±4-mA Output Drive at 5V
6. Low Input Current of 1 μA Max
7. Full Decoding of Input Logic
8. All Outputs Are High for Invalid BCD Conditions
9. Also for Applications as 3-Line to 8-Line Decoders

Pinouts:
SN74HC42DR datasheet

Description

These decimal decoders consist of eight inverters and ten 4-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic ensures that all inputs remain off for all invalid input conditions.

Block Diagram :

components

 

SN74HC42DR Datasheet PDF Download


SN74HC42DR pdf

Other data sheets are available within the file: 54HC42FK, 54HC42J, 54HC42W, 74HC42, 7442