Part Number: 74HC138-Q100

Function: 3-to-8 line decoder/demultiplexer; inverting

Package: 16 Pin Type

Manufacturer: NXP Semiconductors.

Pinouts:

 

Description

The 74HC138-Q100, 74HCT138-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC138-Q100; 74HCT138-Q100 decoder accepts three binary weighted address inputs (A0, A1 and A3) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0to Y7).

The 74HC138-Q100, 74HCT138-Q100 featuresthree enable inputs: two active LOW(E1 and E2) and one active HIGH(E3). Every output will be HIGH unless E1 and E2are LOW and E3 is HIGH.

This multiple enable function allows easy parallel expansion of the 74HC138-Q100; 74HCT138-Q100 to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HC138-Q100;74HCT138-Q100 ICs and one inverter. The 74HC138-Q100; 74HCT138-Q100 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes.

Not used enable inputs must be permanently tied to their appropriate active HIGH- or LOW-state.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.

 

Features

1. Automotive product qualification in accordance with AEC-Q100 (Grade 1)

2. Demultiplexing capability

3. Multiple input enable for easy expansion

4. Complies with JEDEC standard no. 7A

5. Ideal for memory chip select decoding

6. Active LOW mutually exclusive outputs

Other data sheets are available within the file:

74HC138, 74HC138BQ-Q100, 74HC138D-Q100, 74HC138PW-Q100

74HC138-Q100 Datasheet PDF Download

Part Number: 74AHC139

Function: Dual 2-to-4 line Decoder/Demultiplexer

Package: SO, TSSOP 16 Pin

Manufacturer: NXP Semiconductors.

Pinouts:

 

Description

The 74AHC139, 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.

The devices are a high-speed, dual 2-to-4 line decoder/demultiplexer. This device has two independent decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application.

Features

1. Balanced propagation delays

2. All inputs have Schmitt-trigger actions

3. Inputs accept voltages higher than VCC

4. ESD protection :

(1) HBM EIA/JESD22-A114E exceeds 2000 V

(2) MM EIA/JESD22-A115-A exceeds 200 V

(3) CDM EIA/JESD22-C101C exceeds 1000 V

The IC is identical to the HEF4556 of the HE4000B family.

Other data sheets are available within the file: 74AHC139D, 74AHC139PW, 74139

74AHC139 Datasheet PDF Download