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SSTV16859 Datasheet PDF – Dual Output 13-Bit Register

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Part Number: SSTV16859

Function: Dual Output 13-Bit Register with SSTL-2 Compatible I/O and Reset

Package: 96-Ball FBGA, 64-Pin TSSOP

Manufacturer: Fairchild Semiconductor

Pinouts:

SSTV16859 datasheet

 

General Description

The SSTV16859 is a dual output 13-bit register designed for use with 184 and 232 pin DDR-1 memory modules. The device has a differential input clock, SSTL-2 compatible data inputs and a LVCMOS compatible RESETinput. The device has been designed to meet the JEDEC DDR mod ule register specifications. The device has been fabricated on an advanced sub micron CMOS process and is designed to operate at power supplies of less than 3.6V’s.

Features

1. Compliant with DDR-I registered module specifications

2. Operates at 2.5V ±0.2V VDD

3. SSTL-2 compatible input structure

4. SSTL-2 compliant output structure

5. Differential SSTL-2 compatible clock inputs

6. Low power mode when device is reset

7. Industry standard 64 pin TSSOP package

8. Also packaged in plastic Fine-Pitch Ball Grid Array(FBGA)

Other data sheets are available within the file: SSTV16859G, SSTV16859MTD

SSTV16859 Datasheet PDF Download


SSTV16859 pdf

74LV4094 Datasheet – 8-stage Shift-and-store Bus Register

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Part Number: 74LV4094

Function: 8-stage shift-and-store bus register

Package: SSOP 16, TSSOP 16 Pin Type

Manufacturer: Philips Electronics ( https://www.nxp.com/ )

Pinouts:

74LV4094 datasheet

 

Description

The 74LV4094 is a low voltage Si-gate CMOS device and is pin and functional compatible
with 74HC4094, 74HCT4094.

The 74LV4094 is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs QP0 to QP7. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive-going clock transitions.

The data in each shift register stage is transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at the outputs whenever the output enable (OE) signal is HIGH.

Features

1. Optimized for low voltage applications: 1.0 to 3.6 V

2. Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

3. Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Tamb = 25°C

4. Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb = 25°C

5. Output capability: standard

6. ICC category : MSI

Applications:

1. Serial-to-parallel data conversion

2. Remote control holding register

Other data sheets are available within the file:

74LV4094D, 74LV4094DB, 74LV4094N, 74LV4094PW

 

74LV4094 Datasheet PDF Download


74LV4094 pdf