EPM7064SLI84-7 Datasheet – Programmable Logic Device

Part Number: EPM7064SLI84-7

Function: Programmable logic , 64 macrocells, 4 logic array blocks, 68 I/O pins, 7ns

Package: 44 Pin, 84-Pin PLCC

Manufacturer: Altera Corporation

Image and Pinouts:

EPM7064SLI84-7 datasheet


The EPM7064SLI84-7 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz.


1. High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture

2. 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices – ISP circuitry compatible with IEEE Std. 1532

3.  Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices

4.  Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S devices with 128 or more macrocells

Other data sheets are available within the file:

EPM7064AEFC100-7, EPM7064AETC100-7, EPM7064AETI100-7,

EPM7064QC100-7, EPM7064SLC84-7

EPM7064SLI84-7 Datasheet PDF Download

EPM7064SLI84-7 pdf