H5TC4G83MFR Datasheet – 4Gb DDR3L SDRAM ( PDF )

Part Number: H5TC4G83MFR

Function: 4Gb DDR3L SDRAM

Package: 78ball FBGA, 96ball FBGA

Manufacturer: Hynix Semiconductor

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H5TC4G83MFR datasheet



The H5TC4G83MFR-xxA(I) and H5TC4G63MFR-xxA(I) are a 4Gb low power Double Data Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density, high bandwidth and low power operation at 1.35V. SK Hynix DDR3L SDRAM provides backward compatibility with the 1.5V DDR3 based environment without any changes. (Please refer to the SPD information for details.)

SK Hynix 4Gb DDR3L SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the clock (falling edges of the clock), data, data strobes and write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.


1. DM masks write data-in at the both rising and falling edges of the data strobe

2. All addresses and control inputs except data, data strobes and data masks latched on the
rising edges of the clock

3. Driver strength selected by EMRS

4. Dynamic On Die Termination supported

5. Asynchronous RESET pin supported

6. ZQ calibration supported

7. TDQS (Termination Data Strobe) supported (x8 only)

8. Write Levelization supported

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H5TC4G83MFR Datasheet PDF Download

H5TC4G83MFR pdf