K4S561632J Datasheet – 256Mbit ( 16M x 16 ) , SDRAM

Part Number: K4S561632J

Function: 256Mbit J-die SDRAM

Package: TSOP 54 Pin Type

Manufacturer: Samsung

Image and Pinouts:

K4S561632J datasheet


The K4S560432J / K4S560832J / K4S561632J is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 16,777,216 words by 4 bits / 4 x 8,388,608 words by 8bits / 4 x 4,194,304 words by 16bits fabricated with SAMSUNGs high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth high performance memory system applications.


• JEDEC standard 3.3V power supply

• LVTTL compatible with multiplexed address

• Four banks operation

• MRS cycle with address key programs
– CAS latency (2 & 3)
– Burst length (1, 2, 4, 8 & Full page)
– Burst type (Sequential & Interleave)

• All inputs are sampled at the positive going edge of the system clock.

• Burst read single-bit write operation

• DQM (x4,x8) & L(U)DQM (x16) for masking


Other data sheets are available within the file:

K4S560432JU1C/L75, K4S560832JUC/L75, K4S561632JUC/L50, K4S561632J-UC/L60


K4S561632J Datasheet PDF Download

K4S561632J pdf