LS138 Datasheet – 3-to-8-Line Decoder/Demultiplexer

Part Number: LS138, SL74LS138N, SL74LS138D

Function : 3-to-8-Line Decoder/Demultiplexer

Package: DIP or SOIC 16 Pin

Manufacturer: System Logic Semiconductor




The LS138 is Decoder / Demultiplexer.

This schottky -clamped TTL MSI circuit is designed to be used in high-performance memory -decording or data-routing applications requiring very short propagation delay time. In high-performance memory systems this decode can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit the delay times of this decorder and the enable time of the memory are usually less than the typical access times of the memory. This means that the effective system delay introduced by the schottky -clampled system decoder is negligible.

Pinout and Logic Table

LS138 datasheet pinout


1. Designed Specifically for High Speed Memory Decoders andData Transmission Systems

2. Incorporate 3 Enabler Inputs to Simplify Cascading AND/OR Data Reception

3. Schottky Clamped for High Performance

4. Demultiplexing Capability

5. Multiple Input Enable for Easy Expansion

6. Typical Power Dissipation of 32 mW

7. Active Low Mutually Exclusive Outputs

8. Input Clamp Diodes Limit High Speed Termination Effects

LS138 Datasheet PDF


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