CD4047BCN Datasheet – Monostable / Astable Multivibrator

Part Number: CD4047BCN

Function: Low Power Monostable / Astable Multivibrator

Package: DIP 14 Pin

Manufacturer: Fairchild Semiconductor

Pinouts:

CD4047BCN datasheet

 

Description

The CD4047B, CD4047BCN is capable of operating in either the monostable or astable mode. It requires an external capacitor (between pins 1 and 3) and an external resistor (between pins 2 and 3) to determine the output pulse width in the monostable mode, and the output frequency in the astable mode.

Astable operation is enabled by a high level on the astable input or low level on the astableinput. The output frequency (at 50% duty cycle) at Q and Qoutputs is determined by the timing components. A frequency twice that of Q is available at the Oscillator Output; a 50% duty cycle is not guaranteed.

 

Features

1. Wide supply voltage range: 3.0V to 15V

2. High noise immunity: 0.45 VDD (typ.)

3. Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS

Applications:

1. Frequency discriminators

2. Timing circuits

3. Time-delay applications

4. Envelope detection

5. Frequency multiplication

6. Frequency division

Other data sheets are available within the file:

CD4047BC, CD4047BCMX, CD4047BCN, CD4047BCW

 

CD4047BCN Datasheet PDF Download


CD4047BCN pdf

54LS123 Datasheet – Monostable Multivibrator – Motorola

Part Number: 54LS123, SN54LS123

Function:  Retriggerable Monostable Multivibrator

Package: DIP, SOP 16 Pin

Manufacturer: Motorola => Freescale

Pinouts:

54LS123 datasheet

 

Description

Thesedc triggered multivibrators feature pulse width controlby three methods.The basic pulse width is programmed by selection of external resistance andcapacitance values. The LS122 has an internal timing resistor that allows thecircuits to be used with only an external capacitor. Once triggered, the basic pulse width may be extended by retriggering the gated low-level-active (A) or high-level-active (B) inputs, or be reduced by use of the overriding clear.

Features

1. Overriding Clear Terminates Output Pulse
2. Compensated for VCC and Temperature Variations
3. DC Triggered from Active-High or Active-Low Gated Logic Inputs
4. Retriggerable for Very Long Output Pulses, up to 100% Duty Cycle

Other data sheets are available within the file: 54LS122, SN54LS123J, 74LS123, SN54LS122

54LS123 Datasheet PDF

54LS123 pdf