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EST7502 Datasheet – PC Power Supply PWM with Supervisor

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Part Number: EST7502

Function: PC Power Supply PWM with Supervisor

Pinouts: DIP 16 Pin type

Manufacturer: EST

Pinout

EST7502 datasheet

 

Description

The EST7502B is a pulse–width modulation (PWM) control circuit with complete protection circuits for used in the SMPS (Switched Mode Power Supply). It contains various functions, which are Over Voltage Protection, Under Voltage Protection, Power Good Output (PGO), Remote On/Off control and etc. It can minimize external components of switching power supply systems in personal computer.

Over Voltage Protection (OVP) monitors 3.3V, 5V, 12V and PT input voltage level. Under Voltage Protection (UVP) monitors 3.3V, 5V and 12V input voltage level. Power Good Output monitors the voltage level of power supply.

 

Features

1. Complete PWM Control and Protection Circuitry
2. Over Voltage Protection for 3.3V / 5V / 12V / PT
3. Under Voltage Protection for 3.3V / 5V / 12V
4. 280ms PG Time Delay
5. Power Good Output is Open Drain Output
6. PWM Control Output are Open Drain Output
7. 280 ms Time Delay for UVP
8. Remote ON/OFF function De–

 

EST7502 Datasheet

EST7502 pdf

Other data sheets are available within the file:

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HY510N Datasheet – PC Power Supply Supervisor – Hawyang

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This is one of the supervisor types.

Part Number: HY510N

Function: PC Power Supply Supervisor

Package: DIP 8 Pin type

Manufacturer: Hawyang ( hawyang.com.tw )

See the preview image and the PDF file for more information.

Image:

HY510N image

Description

The HY510N provides protection circuits, power goodoutput (PGO), fault protection latch (FPL_N), and a protection detector function (PDON_N) control. It can minimize external components of switching power supply systems in personal computer. The Over Voltage Detector (OVD) monitors 3.3V , 5V , 12V input voltage level. The Under Voltage Detector (UVD) monitors 3.3V , 5V input voltage level. When OVD or UVD detect the fault voltage level, the FPL_N is latched HIGH and PGO go low. The latch can be reset by PDON_N goo HIGH. There is 2.4 ms delay time for PDON_N turn off FPL_N. When OVD and UVD detect the right voltage level, the power good output (PGO) will be issue.

HY510N Pinout

HY510N datasheet pinout
Features

1. The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level.
2. The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level.
3. Both of the power good output (PGO) and fault protection latch (FPL_N) are Open Drain Output.
4. 75 ms time delay for UVD.
5. 300 ms time delay for PGO.
6. 38 ms for PDON_N input signal De–bounce.
7. 73 us for internal signal De–glitches.
8. 2.4 ms time delay for PDON_N turn-off FPL_N.

HY510N Datasheet PDF


 

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