AR7242 Datasheet PDF – Network Processor – Atheros

Part Number: AR7242

Function : High Performance And Cost-Effective Network Processor

Package:  LQFP 128 pin Package

Manufacturer: Atheros Communications

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AR7242 Network Processor

Description

The Atheros AR7242 is a high performance and cost effective network processor for access point, router, and gateway applications.

It includes a MIPS 24Kc processor, PCI Express 1.1 host interface, integrated 10/100 Mbps
Fast Ethernet MAC/PHY, one RGMII port, one USB 2.0 MAC/PHY, and external memory
interface for serial Flash, DDR1 or DDR2 interface, an I2S audio interface, a high-speed
UART, and GPIOs that can be used for LED controls or other general purpose interface
configurations.

 

Pinout

AR7242 datasheet pinout

 

Features

1. Integrated MIPS 24 K 32-bit processor operating at up to 400 MHz
2. 64 K instruction cache and 32 K data cache
3. Integrated 10/100 802.3 Ethernet LAN port and one RGMII port
4. 16-bit DDR1 or DDR2 memory interface supporting up to 400 M transfers per second

 

AR7242 Datasheet


 

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TMS320C57SPGE57 Datasheet PDF – 16-Bit Digital Signal Processor

Part Number: TMS320C57SPGE57

Function: 16-Bit Digital Signal Processor

Manufacturer: Texas Instruments

Pinouts:

TMS320C57SPGE57 datasheet

 

Description

The TMS320C57SPGE57, TMS320C5x generation of the Texas Instruments (TI) TMS320 digital signal processors (DSPs) is fabricated with static CMOS integrated circuit technology; the architectural design is based upon that of an earlier TI DSP, the TMS320C25. The combination of advanced Harvard architecture, on-chip peripherals, on-chip memory, and a highly specialized instruction set is the basis of the operational flexibility and speed of the ’C5x‡devices. They execute up to 50 million instructions per second (MIPS).

Features

1. Powerful 16-Bit TMS320C5x CPU

2. 20-, 25-, 35-, and 50-ns Single-Cycle Instruction Execution Time for 5-V Operation

3. 25-, 40-, and 50-ns Single-Cycle Instruction Execution Time for 3-V Operation

4. Single-Cycle 16 × 16-Bit Multiply/Add

5. 224K × 16-Bit Maximum Addressable External Memory Space (64K Program, 64K Data, 64K I/O, and 32K Global)

6. 1K Dual-Access On-Chip Program/Data RAM (DARAM)

7. Full-Duplex Synchronous Serial Port for Coder /Decoder Interface

8. Time-Division-Multiplexed (TDM) Serial Port

9. Hardware or Software Wait-State Generation Capability

10. On-Chip Timer for Control Operations

11. Repeat Instructions for Efficient Use of Program Space

12. Multiple Phase-Locked Loop (PLL)

13. High-Performance Static CMOS Technology

14. IEEE Standard 1149.1†Test-Access Port(JTAG)

 

Block Moves for Data/Program
On-Chip Scan-Based Emulation Logic

Five Packaging Options :
– 100-Pin Quad Flat Package (PJ Suffix)
– 100-Pin Thin Quad Flat Package(PZ Suffix)
– 128-Pin Thin Quad Flat Package(PBK Suffix)
– 132-Pin Quad Flat Package (PQ Suffix)
– 144-Pin Thin Quad Flat Package (PGE Suffix)

 

TMS320C57SPGE57 Datasheet PDF Download


TMS320C57SPGE57 pdf

Other data sheets are available within the file:

TMS320C50, TMS320C50PQA57, TMS320C51, TMS320C52, TMS320C53