CD74HC192E Datasheet PDF – 4-Bit Up / Down Counter

Part Number: CD74HC192E

Function: Presettable Synchronous 4-Bit Up/Down Counter

Package: 16 Ld PDIP

Manufacturer: Texas Instruments

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CD74HC192E datasheet



The CD74HC192, CD74HC193, CD74HC192E and CD74HCT193 are asynchronously  presettable BCD Decade and Binary Up/Down synchronous  counters, respectively. Presetting the counter to the number on the preset data inputs (P0-P3) is accomplished by a LOW asynchronous parallel load input (PL). The counter is incremented on the low-to-high transition of the Clock-Up input (and a high level on the Clock- Down input) and decremented on the low to high transition of the Clock-Down input (and a high level on the Clock-up input).

A high level on the MR input overrides any other input to clear the counter to its zero state. The Terminal Count up (carry) goes low half a clock period before the zero count is reached and returns to a high level at the zero count. The Terminal Count Down (borrow) in the count down mode likewise goes low half a clock period before the maximum count (9 in the 192 and 15 in the 193) and returns to high at the maximum count. Cascading is effected by connecting the carry and borrow outputs of a less significant counter to the Clock-Up and Clock-Down inputs, respectively, of the next most significant counter.



1. Synchronous Counting and Asynchronous Loading

2. Two Outputs for N-Bit Cascading

3. Look-Ahead Carry for High-Speed Counting

4. Balanced Propagation Delay and Transition Times

5. Significant Power Reduction Compared to LSTTL Logic ICs


CD74HC192E Datasheet PDF Download

CD74HC192E pdf

Other data sheets are available within the file:

54HC192F3A, 54HC193F3A, 54HCT193F3A, 74HC192, 74HC192E