Part Number: SN65DSI86
Function: MIPI DSI BRIDGE TO eDP
Package: NFBGA 64 Pin Type
Manufacturer: Texas Instruments
Pinouts:
Description
The SN65DSI86, SN65DSI96 DSI to embedded DisplayPort(eDP) bridge features a dual-channel MIPI D-PHY receiver front-end configuration with 4 lanes per channel operating at 1.5Gbps per lane;
a maximum input bandwidth of 12Gbps. The bridge decodes MIPI DSI 18bpp RGB666 and 24bpp RGB888 packets and converts the formatted video data stream to a DisplayPort with up to four lanes at either 1.62Gbps, 2.16Gbps, 2.43Gbps, 2.7Gbps, 3.24Gbps, 4.32Gbps, or 5.4Gbps.
Features
1. Implements MIPI D-PHY version 1.1 physical layer front-end and display serial interface (DSI) version 1.02.00
2. Dual-channel DSI receiver configurable for one, two, three, or four D-PHY data lanes per channel operating up to 1.5 Gbps per lane
3. Supports 18 bpp and 24 bpp DSI video packets with RGB666 and RGB888 formats
SN65DSI86 Datasheet PDF Download
Other data sheets are available within the file: SN65DSI86ZQER, SN65DSI96ZQER