Part Number: SP8611
Function: Asynchronous ECL Divide
Package: DIP 14 Pin type
Manufacturer: GEC Plessey
Image and Pinouts:
The SP8610 and SP8611 are asynchronous ECL divide by four circuits with ECL compatible outputs which can also be used to drive 100Ω lines. They feature input sensitivities of 600mV p-p (800mV p-p above 1300MHz).
1. ECL Compatible Outputs
2. AC-Coupled Inputs (Internal Bias)
Operating Notes :
1. The clock input (pin 4) should be capacitively coupled to the signal source. The input signal path is completed by connecting a capacitor from the internal bias decoupling, pin 6, to ground.
2. In the absence of a signal the device will self-oscillate. If this is undesirable, it may be prevented by connecting a 10kΩ resistor from the unused input to VEE i.e. from pin 4 to pin 7. This will reduce
the input sensitivity by approximately 100mV.
3. The circuit will operate at very low input frequencies but slew rate must be better than 200V/µs.
QUICK REFERENCE DATA
1. Supply Voltage: 25·2V
2. Power Consumption: 380mW
3. Max. Input Frequency: 1500MHz (SP8611B)
Other data sheets are available within the file: SP8610AADG, SP8610ADG, SP8610BDG, SP8610NA1C