Hi3516D Datasheet PDF – Professional HD IP Camera IC

Part Number: Hi3516D

Function: Professional HD IP Camera SoC

Package:  15 mm x 15 mm (0.59 in. x 0.59 in.), 0.65mm (0.03 in.) ball pitch, TFBGA Type

Manufacturer: HiSilicon Technologies ( http://www.hisilicon.com )


Hi3516D datasheet


As a new-generation SoC designed for the HD IP camera, the Hi3516D integrates a new-generation ISP and adopts the latest H.265 compressed video encoder, advanced low-power technology, and low-power architecture design. These features help the Hi3516D keep the leading position in the aspects of low bit rate, high picture quality, and low power consumption.

1. Supports maximum 5-megapixel CMOS sensor, the maximum frame rate is 15fps, 3MP and below resolution is 30fps.

2. Supports 16-bit DDR3/3L, support single 16-bit 4G cache

3. Power consumption is 900mW

Hi3516D pinout


1. Adjustable 3A functions (AE, AWB, and AF)
2. Noise reduction in FPN mode
3. Highlight compensation, backlight compensation, gamma correction, and color enhancement
4. Defect pixel correction, denoising, and digital image stabilizer
5. Anti-fog
6. Lens distortion correction
7. Picture rotation by 90° or 270°
8. Mirroring and flipping
9. Digital WDR, frame base/line base WDR, and tone mapping



Hi3516D Datasheet PDF


Other data sheets are available within the file: Hi3516

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SN65LVDS315 Datasheet PDF – Camera Serializer

Part Number: SN65LVDS315

Function: Camera Parallel RGB to MIPI CSI-1 Serial Converter

Package: 4×4 mm VQFN Package

Manufacturer: Texas Instruments


SN65LVDS315 datasheet



The SN65LVDS315 is a camera serializer that converts 8-bit parallel camera data into MIPI-CSI1 or SMIA CCP compliant serial signals. The device converts the parallel 8-bit data to two sub low-voltage differential signaling (SubLVDS) serial data and clock output. The parallel data is latched in with the pixel clock input DCLK on the falling clock edge. The control inputs VS and HS are used to determine line and frame synchronization.The serialized data is presented on the differential serial data output DOUT with a differential clock signal on output CLK. The frequency of CLK is 8× the DCLK input pixel clock rate.


1. MIPI CSI-1 and SMIA CCP Support
2. Connects Directly to OMAP CSI Interface
3. ESD Rating >3 kV (HBM) Camera Input Ports and >2 kV (HBM) All Other Ports
4. Pixel Clock Range 3.5–27 MHz
5. Three Operating Modes to Conserve Power
(1) Active Mode VGA Camera 30 fps: 7 mA
(2) Typical Shutdown and Standby: 0.5 μA
6. EMI


1. Camera to Host Controller
2. Mobile Phones and Smart Phones

Official Hompage : https://www.ti.com/product/SN65LVDS315

Other data sheets are available within the file:


SN65LVDS315 Datasheet PDF Download

SN65LVDS315 pdf