SA121A Datasheet PDF – Crystal Clock Oscillator

Part Number: SA121A

Function: TTL compatible enable/disable crystal clock oscillator

Package: PCB DIP 4 Pin Type

Manufacturer: NEL Frequency Controls

Images :

SA121A datasheet

Description

The SA121A Series of quartz crystal oscillators provide enable/disable 3-state TTL compatible signals for bus connected systems. Supplying Pin 1 of the HA-1210 units with a logic “1″ enables the output on Pin 5. In the disabled mode, Pin 5 presents a high impedance to the load. All units are resistance welded in an all metal package, offering RFI shielding, and are designed to survive standard wave soldering operations without damage. Insulated standoffs to enhance board cleaning are standard.

Features

1. Wide frequency range – 0.5MHz to 36MHz
2. User specified tolerance available
3. Low Jitter
4. High Q Crystal actively tuned oscillator circuit
5. Power supply decoupling internal
6. Low power consumption

Ordering Information

components

Other data sheets are available within the file: HA-1210, SA-A1210, SA-A121A, SA-A121B

SA121A Datasheet PDF Download

SA121A pdf

LMK04906 Datasheet PDF – Clock Jitter Cleaner

Part Number: LMK04906

Function: Ultra Low Noise Clock Jitter Cleaner/Multiplier with 6 Programmable Outputs

Package: 64-Pin WQFN (9.0 x 9.0 x 0.8 mm) Type

Manufacturer: Texas Instruments

Pinouts:

LMK04906 datasheet

 

Description

The LMK04906 is the industry’s highest performance clock jitter attenuator with superior clock jitter cleaning, generation, and distribution with advanced features to meet high performance timing application needs.

The device accepts 3 clock input ranging from 1 kHz to 750 MHz and generates 6 unique clock output frequencies ranging from 2.26 MHz to 2.6 GHz. The LMK04906 can also buffer a crystal or VCXO to generate a 7th unique clock frequency.

The device provides virtually all frequency translation combination required for SONET, Ethernet, Fibre Channel and multi-mode Wireless Base Stations.

Features

1. Ultralow RMS Jitter Performance

(1) 100-fs RMS Jitter (12 kHz to 20 MHz)

(2) 123-fs RMS Jitter (100 Hz to 20 MHz)

2. Dual Loop PLLatinum PLL Architecture

LMK04906 Datasheet PDF Download


LMK04906 pdf

Other data sheets are available within the file:

LMK04906BISQ, LMK04906BISQ/NOPB, LMK04906BISQE, LMK04906BISQE/NOPB