processor

AML6210DP PDF Datasheet – A/V Processor

Posted on by pinout

Part Number: AML6210DP

Function: A/V Processor

Package: PLCC 144 Pin Type

Manufacturer: AMLOGIC

Images:

AML6210DP datasheet

Description

The AML6210DP A/V processor is a complete integrated system targeting the digital picture frame market. The device combines a super fast JPEG decoder, all digital LCD drivers/TCON signals, USB and card‐reader I/Os and a 32‐bit host CPU in a small 144 pin package.

The embedded 32‐bits core CPU handles all system related application software. It executes AVOS, the base operating system for AML6210DP. All applications and drivers run on top of AVOS. Drivers including USB drivers, card‐reader hardware driver, and video and other hardware related programming interfaces are provided by AVOS. Applications include graphical user interfaces and file system sub‐system are also included. Developers can add additional applications to customize for each platform. [ … ]

Features

1. Embedded 32‐bits core RISC processor for system control

2. Complete JPEG decoding logic and video scaling logic

3. Complete audio decoding and stereo audio DACs

4. Integrated digital LCD video signals and TCON

5. Integrated USB 2.0 High Speed OTG port

 

AML6210DP Datasheet

Related articles across the web

P3041NXE7PNC Datasheet PDF – Quad-core Processor

Posted on by pinout

Part Number: P3041NXE7PNC

Function: P3041 Optimized Quad-core Processor

Package: BGA Type

Manufacturer: Freescale Semiconductor

Image and Pinouts:

P3041NXE7PNC datasheet

 

Description

The QorIQ P3041 processor is an optimized, quad-core device that leverages architectural features pioneered in the P4 platform. Built on Power Architecture technology, the P3041 fits into many of the same applications as the P4 platform processors, yet is designed to offer a more power- and cost-efficient solution.

The P3041 includes P4 platform features such as the three-level cache hierarchy for low latencies, hardware hypervisor for robust virtualization support, data path acceleration architecture (DPAA) for offloading packet handling tasks from the core and the CoreNet switch fabric which eliminates internal bottlenecks. This enables architectural compatibility from the P3041 to the P4 platform and also to the P5 platform, which uses the same architecture.

Features

1. Four e500mc cores, built on Power Architecture technology

• Up to 1.5 GHz

• Each with 128 KB backside L2 cache

2. Memory controller

• DDR3, 3L up to 1.3 GHz

• 32/64-bit data bus w/ECC

 

P3041NXE7PNC Datasheet PDF Download


P3041NXE7PNC pdf

Other data sheets are available within the file:

P3041NSE1MMB, P3041NSE1NNB, P3041NSE1PNB, P3041NSE7MMC, P3041NSE7NNC