Serial

JM20330 Datasheet PDF – Serial ATA Bridge Chip – JMicron

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Part Number: JM20330

Function: Serial ATA Bridge Chip

Package: 64-pin TQFP

Manufacturer: JMicron Technology Corp.

Images :

JM20330 datasheet

Description

The Serial ATA Bridge is a single chip solution for serial and parallel ATA translation. It includes the Serial ATA PHY, Link, Transport, and parallel ATA (application layer) controller. The main applications are for legacy IDE storage devices connecting to newer chipset supporting serial ATA, such as the iCH5 south bridge of Intel chipset, and serial ATA IDE storage devices connecting to traditional IDE south bridge.

Pinout

components

Features

1. 0.18um CMOS technology.
2. Serial ATA 1.5Gbps (Gen. 1) PHY.
3. Spread-Spectrum Clock (SSC) technology.
4. 1.8V and 3.3V power system.
5. 25MHz external reference clock.

Other data sheets are available within the file: M20330

JM20330 Datasheet PDF Download


JM20330 pdf

 

74HC595N Datasheet – 8-stage Serial Shift Register – Philips

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Part Number: 74HC595N

Function : 8-bit serial-in/serial or parallel-out shift register with output latches 3-state

Manufacturer: Philips

Image
74HC595N image

Features

• 8-bit serial input
• 8-bit serial or parallel output
• Storage register with 3-state outputs
• Shift register with direct clear
• 100 MHz (typical) shift out frequency
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.

Applications
• Serial-to-parallel data conversion
• Remote control holding register.

Pinout

74HC595N datasheet

Description

The 74HC/HCT595 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift register and storage register have separate clocks. Data is shifted on the positive-going transitions of the SH_CP input. The data in each register is transferred to the storage register on a positive-going transition of the ST_CP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.

74HC595N Datasheet