Function: Dual JK Positive Edge-Triggered Flip-Flop
Package: DIP, SOP, SOIC 16 Pin type
Manufacturer: Fairchild Semiconductor
The 74F109 consists of two high-speed, completely independent transition clocked JKflip-flops. The clocking operationis independent of rise and fall times of the clock waveform.
The JKdesign allows operation as a D-type flip-flop (referto F74 data sheet) by connecting the J and Kinputs.
Asynchronous Inputs :
1. LOW input to SD sets Q to HIGH level
2. LOW input to CD sets Q to LOW level
3. Clear and Set are independent of clock
4. Simultaneous LOW on CD and SD makes both Q and Q HIGH
Absolute Maximum Ratings :
1. Storage Temperature : – 65°C to +150°C
2. Ambient Temperature under Bias : – 55°C to +125°C
3. Junction Temperature under Bias : – 55°C to +175°C
4. VCC Pin Potential to Ground Pin : – 0.5V to +7.0V