M312L2828ET0 Datasheet – DDR SDRAM – Samsung ( PDF )

Part Number: M312L2828ET0

Function : DDR SDRAM Registered Module, 1GB, 128M x 72 ECC Module

Manufacturer: Samsung

Image M312L2828ET0 image

Features

• VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR266, 333
• VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe [DQ](x4,x8) & [L(U)DQS] (x16)
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• Programmable Read latency : DDR266(2, 2.5 Clock), DDR333(2.5 Clock), DDR400(3 Clo
• Programmable Burst length (2, 4, 8)
• Programmable Burst type (sequential & interleave)
• Edge aligned data output, center aligned data input
• Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh)
• Serial presence detect with EEPROM
• SSTL_2 Interface
• 66pin TSOP II and 60 ball FBGA Leaded & Pb-Free(RoHS compliant) package

Block Diagram

M312L2828ET0 datasheet

Description

DRAM is a type of RAM (random access memory) used as the main memory in several computing devices, such as desktop and notebook computers, servers, and high-end workstations. It is the most widely used semiconductor memory used in current generation computers, and offers several significant advantages, such as structural simplicity, very high packing densities (number of bytes that can be stored per unit of chip area), low power consumption, and sufficiently high data read/write speeds. Several types of DRAM are presently available for deployment on various computing platforms, such as home/personal computers, portable computers, and network servers. This type of memory has undergone several innovative technological developments and offers very high price/performance ratios.

Official Homepage: https://semiconductor.samsung.com/

M312L2828ET0 Datasheet


 

48LC16M16A2 Datasheet – 4Megx16x4banks, SDRAM – Micron

Part Number: 48LC16M16A2, MT48LC16M16A2

Function: SDR SDRAM ( 4 Meg x 16 x 4 banks )

Package: 54-ball FBGA, 54-pin TSOP II

Manufacturer: Micron Technology

Image

48LC16M16A2 sdram micron

Description

The 256Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x4’s 67,108,864-bit banks is organized as 8192 rows by 2048 columns by 4bits. Each of the x8’s 67,108,864-bit banks is organized as 8192 rows by 1024 columns by 8 bits. Each of the x16’s 67,108,864-bit banks is organized as 8192 rows by 512 columns by 16 bits.

Pinout

48LC16M16A2 datasheet pinout

 

Features

1. PC100- and PC133-compliant

2. Fully synchronous; all signals registered on positive edge of system clock

3. Internal, pipelined operation; column address can be changed every clock cycle

4. Internal banks for hiding row access/precharge

5. Programmable burst lengths: 1, 2, 4, 8, or full page

6. Auto precharge, includes concurrent auto precharge and auto refresh modes

7. Self refresh mode (not available on AT devices)

 

48LC16M16A2 Datasheet PDF


 

 

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