AS6001SP8 Datasheet – FM Stereo Audio Transmitter – Accel

Part Number: AS6001SP8

Function: FM STEREO AUDIO TRANSMITTER,I2C-BUS IC

Package : SOP16

Manufacturer: Accel Semiconductor

Image :
AS6001SP8

Description

The AS6001, AS6002, AS6001SP8 is an innovative highly integrated FM stereo transmitter. It is the first generation of FM transmitter IC designed using Accel’s patent-pending RF technology. It consists of a stereo encoder and FM transmitter. The stereo encoder is based on signal processing to encode analog stereo audio input signal and generate a composite FM signal with MAIN, SUB and pilot signal from a 7.6MHz oscillator.

Features

1. Highly integrated FM stereo transmitter
2. Patent-pending architecture
3. Low power operation, extremely suitable for portable devices
4. Ultra low standby current in 10uA with PDN enable
5. LDO embedded for easy power supply design

AS6001SP8 Datasheet pinout

Application

1. MP3 Player
2. Cellular Handsets
3. Wireless Microphone
4. Personal Media Player
5. Personal Computer
6. Game Machine
7. Car Audio

Reference Site
1. http://peling.ru/peredelyivaem-fm-transmitter-na-as6001sp8/
2. http://vrtp.ru/index.php?showtopic=16681

AS6001SP8 Datasheet


AS6001SP8 pdf

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SN65LVDS311 Datasheet PDF – 27 Bit Display Transmitter

Part Number: SN65LVDS311

Function: Programmable 27 Bit Display Serial Interface Transmitter

Package: DSBGA 49 Pin Type

Manufacturer: Texas Instruments

Image

SN65LVDS311 datasheet pdf

 

Description

The SN65LVDS311 serializer transmits 27 parallel input data over 1, 2, or 3 serial output links. The device pinout is optimized to interface with the OMAP3630 application processor. The device loads a shift register with the 24 pixel bits and 3 control bits
from the parallel CMOS input interface. The data are latched into the device by the pixel clock, PCLK. In addition to the 27 bits, the device adds a parity bit and two reserved bits for a total number of 30 serial bits. The parity bit allows a receiver to detect single
bit errors. Odd parity is implemented. The serial shift register is uploaded through 1, 2, or 3 serial outputs at 30, 15, or 10 times the pixel clock data rate. A copy of the pixel clock is output on an additional differential output. The serial data and clock are transmitted via Sub Low-Voltage Differential Signaling (SubLVDS) lines. The SN65LVDS311 supports three power modes (Shutdown, Standby and Active) to conserve power.

Pinouts:

SN65LVDS311 pinout

Features

1. 2.8 × 2.8mm package size
2. 1.8V input signal swing
3. 24-Bit RGB Data, 3 Control Bits, 1 Parity Bit and 2 Reserved Bits Transmitted over 1, 2 or 3 Differential Lines
4. SubLVDS Differential Voltage Levels
5. Three Operating Modes to Conserve Power
(1) Active-Mode QVGA 17.4mW (typ)
(2) Active-Mode VGA 28.8mW (typ)
(3) Shutdown Mode ≈ 0.5μA (typ)
(4) Standby Mode ≈ 0.5μA (typ)
6. ESD Rating > 3kV (HBM)
7. Pixel Clock Range of 4MHz–65MHz
8. Failsafe on all CMOS Inputs
9. Typical Application: Cameras, Embedded Computers

Official Homepage: https://www.ti.com/product/SN65LVDS311

Other data sheets are available within the file: SN65LVDS311YFFR, SN65LVDS311YFFT

SN65LVDS311 Datasheet PDF Download


SN65LVDS311 pdf